Logic Noise Margin

NMH = VOH_min − VIH_min

Quick answer

This calculator solves NM_H = V_OH_min − V_IH_min (high-state noise margin) for Noise Margin. With Output High (min) 26.4 V, Input High (min) 56.4 V, the result is -30 V. It solves in 3 directions, so you can enter the values you have and get the one you need.

Calculator

Noise Margin (V)
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Formula

NM_H = V_OH_min − V_IH_min (high-state noise margin)

Description

The noise margin is the maximum amount of noise voltage that can be added to a digital signal without causing a logic error at the receiving gate. The high-state noise margin (NMH) is the difference between the minimum output high voltage (VOH) and the minimum input high voltage threshold (VIH). Similarly, the low-state noise margin (NML) = VIL − VOL. Adequate noise margins are essential for reliable digital communication over PCB traces, cables, and backplanes. When noise margins are insufficient, data errors, glitches, and metastability can occur.

Variables

  • NM — Noise margin voltage (V)
  • V_OH — Minimum output high voltage (V)
  • V_IH — Minimum input high voltage threshold (V)

Practical Notes

Typical noise margins: TTL 0.4 V (both NMH and NML), CMOS at 3.3 V about 1.0 V, LVDS 0.1 V (but differential, so effective margin is better). Higher supply voltage generally provides more noise margin. Level translation is required when interfacing logic families with different voltage levels. For long traces, use differential signaling (LVDS, RS-485) which provides much better noise immunity than single-ended logic.

Symbols and units

Symbol Meaning Default unit Accepted units
NM Noise Margin V pV, nV, µV, mV, V, kV
VOH Output High (min) V pV, nV, µV, mV, V, kV
VIH Input High (min) V pV, nV, µV, mV, V, kV

Step by step

  1. 1. What you know: Output High (min) 26.4 V, Input High (min) 56.4 V
  2. 2. The relation: NM_H = V_OH_min − V_IH_min (high-state noise margin)
  3. 3. Substitute: VOH = 26.4 V, VIH = 56.4 V
  4. 4. Result: Noise Margin = -30 V

Worked examples

Minimum range

Given: Output High (min) 0.726 V, Input High (min) 1.55 V

Result: Noise Margin = -0.824 V

Low range

Given: Output High (min) 7.26 V, Input High (min) 15.5 V

Result: Noise Margin = -8.24 V

Typical

Given: Output High (min) 26.4 V, Input High (min) 56.4 V

Result: Noise Margin = -30 V

High range

Given: Output High (min) 0.506 kV, Input High (min) 1.08 kV

Result: Noise Margin = -0.574 kV

Maximum range

Given: Output High (min) 5.06 kV, Input High (min) 10.8 kV

Result: Noise Margin = -5.74 kV

Solving for each variable

Solve for Noise Margin

Output High (min) 0.726 V, Input High (min) 1.55 V → -0.824 V

Solve for Output High (min)

Noise Margin 0.33 V, Input High (min) 1.55 V → 1.88 V

Solve for Input High (min)

Noise Margin 0.33 V, Output High (min) 0.726 V → 0.396 V

How Noise Margin changes with Output High (min)

Output High (min) (input) Noise Margin (result)
5.81 V -118.2 V
14.53 V -109.5 V
29.05 V -94.95 V
43.58 V -80.42 V
58.1 V -65.9 V
87.15 V -36.85 V
116.2 V -7.8 V
0.2324 kV 108.4 V
0.4067 kV 0.2827 kV
0.581 kV 0.457 kV

The same result in other units

Unit Value
mV -30000
V -30
kV -0.03

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Frequently asked questions

How do you calculate Logic Noise Margin?

Use NM_H = V_OH_min − V_IH_min (high-state noise margin). With Output High (min) 26.4 V, Input High (min) 56.4 V, Noise Margin works out to -30 V.

What is the formula for Logic Noise Margin?

The formula is NM_H = V_OH_min − V_IH_min (high-state noise margin). The noise margin is the maximum amount of noise voltage that can be added to a digital signal without causing a logic error at the receiving gate.

How do you find Output High (min) when you know the other values?

Rearrange for Output High (min): with Noise Margin 0.33 V, Input High (min) 1.55 V, Output High (min) is 1.88 V.

How do you find Input High (min) when you know the other values?

Rearrange for Input High (min): with Noise Margin 0.33 V, Output High (min) 0.726 V, Input High (min) is 0.396 V.

What units does Logic Noise Margin use?

Noise Margin is shown in mV, V, kV. Values are held in SI base units internally, so you can mix prefixes without converting by hand.

Related Concepts

All Digital Logic formulas →
CMOS Dynamic Power Rise Time to Bandwidth Setup Time Margin Static Power Dissipation Clock Skew Timing Margin Logic Noise Margin Digital Fanout Pull-Up Resistor for Logic

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