What does N mean in the Digital Fanout formula?

N is Maximum number of gates that can be driven.

Digital Fanout

Q: How do you calculate Digital Fanout?

Use the formula N_max = I_source / I_sink_per_gate. Fanout is the maximum number of gate inputs that a single output can drive while maintaining valid logic levels. Enter the values you know in the calculator above and it solves for the remaining variable.

Q: What is the formula for Digital Fanout?

The Digital Fanout formula is N_max = I_source / I_sink_per_gate, where N—Maximum number of gates that can be driven; I_source—Maximum current the driver can source/sink (A); I_sink—Input current required by each receiving gate (A).

N = Isource / Isink_per_gate

Quick answer

This calculator solves N_max = I_source / I_sink_per_gate for Maximum Fanout. With Driver Source Current 20 mA, Sink Current per Gate 44 mA, the result is 0.4545. It solves in 3 directions, so you can enter the values you have and get the one you need.

Calculator

Driver Source Current

Sink Current per Gate

Maximum Fanout

—

Formula

N_max = I_source / I_sink_per_gate

Description

Fanout is the maximum number of gate inputs that a single output can drive while maintaining valid logic levels. The driving gate must source (or sink) enough current to satisfy all connected inputs. For static CMOS, input currents are negligible (nanoamps of leakage), so fanout is essentially unlimited by DC current. However, dynamic fanout is limited by the capacitive loading of each input (typically 2-10 pF), which slows down signal edges and increases propagation delay. For TTL and BiCMOS, both static current and capacitive loading must be considered.

Variables

N — Maximum number of gates that can be driven
I_source — Maximum current the driver can source/sink (A)
I_sink — Input current required by each receiving gate (A)

Practical Notes

Standard TTL fanout is 10 (IOH = 0.4 mA, IIH = 40 µA). CMOS fanout is theoretically unlimited by DC current but practically limited by capacitive loading to about 20-50 gates before timing degradation becomes unacceptable. For high-fanout nets (clocks, resets), use buffer trees or dedicated clock distribution ICs. In FPGA designs, high fanout nets are automatically handled by the place-and-route tool using buffer insertion.

Symbols and units

Symbol	Meaning	Default unit	Accepted units
N	Maximum Fanout	—	—
Isource	Driver Source Current	mA	pA, nA, µA, mA, A, kA
Isink	Sink Current per Gate	mA	pA, nA, µA, mA, A, kA

Step by step

1. What you know: Driver Source Current 20 mA, Sink Current per Gate 44 mA
2. The relation: N_max = I_source / I_sink_per_gate
3. Substitute: Isource = 20 mA, Isink = 44 mA
4. Result: Maximum Fanout = 0.4545